Applications of Field-Programmable Gate Arrays in Scientific Research

Focusing on resource awareness in field-programmable gate array (FPGA) design, Applications of Field-Programmable Gate Arrays in Scientific Research covers the principle of FPGAs and their functionality. It explores a host of applications, ranging from small one-chip laboratory systems to large-scale applications in "big science."

The book first describes various FPGA resources, including logic elements, RAM, multipliers, microprocessors, and content-addressable memory. It then presents principles and methods for controlling resources, such as process sequencing, location constraints, and intellectual property cores. The remainder of the book illustrates examples of applications in high-energy physics, space, and radiobiology. Throughout the text, the authors remind designers to pay attention to resources at the planning, design, and implementation stages of an FPGA application, in order to reduce the use of limited silicon resources and thereby reduce system cost.

Supplying practical know-how on an array of FPGA application examples, this book provides an accessible overview of the use of FPGAs in data acquisition, signal processing, and transmission. It shows how FPGAs are employed in laboratory applications and how they are flexible, low-cost alternatives to commercial data acquisition systems.
Web Resource
A supporting website at http://scipp.ucsc.edu/~hartmut/FPGA offers more details on FPGA programming and usage. The site contains design elements of the case studies from the book, including VHDL code, detailed schematics of selected projects, photographs, and screen shots.

Hartmut F.-W. Sadrozinski is a research physicist and adjunct professor at the University of California, Santa Cruz. A senior fellow of the IEEE, Dr. Sadrozinski has been working on the application of silicon sensors and front-end electronics in elementary particle physics and astrophysics for over 30 years. He is currently involved in the use of silicon sensors to support hadron therapy. He earned his Ph.D. from the Massachusetts Institute of Technology.
Jinyuan Wu is an electronics engineer in the Particle Physics Division of Fermi National Accelerator Laboratory. Dr. Wu is a frequent lecturer at international workshops and IEEE conferences. He earned his Ph.D. in experimental high energy physics from Pennsylvania State University.

IntroductionWhat is an FPGA?Digital and analog signal processingFPGA costsFPGA versus ASIC

Understanding FPGA ResourcesGeneral-purpose resourcesSpecial-purpose resourcesThe company- or family-specific resources

Several Principles and Methods of Resource Usage ControlReusing silicon resources by process sequencingFinding algorithms with less computationUsing dedicated resourcesMinimizing supporting resourcesRemaining in control of the compilersGuideline on pipeline stagingUsing good libraries

Examples of an FPGA in Daily Design JobsLED illumination Simple sequence control with countersHistogram bookingTemperature digitization of TMP03/04 devicesSilicon serial number (DS2401) readout

The ADC + FPGA StructurePreparing signals for the ADCTopics on averagesSimple digital filtersSimple data compression schemes

Examples of FPGA in Front-End ElectronicsTDC in an FPGA based on multiple-phase clocksTDC in an FPGA based on delay chainsCommon timing reference distributionADC implemented with an FPGADAC implemented with an FPGAZero-suppression and time stamp assignmentPipeline versus FIFOClock-command combined carrier coding (C5)Parasitic event buildingDigital phase followerMultichannel deserialization

Examples of an FPGA in Advanced Trigger SystemsTrigger primitive creationUnrolling nested-loops, doublet findingUnrolling nested-loops, triplet findingTrack fitter

Examples of an FPGA ComputationPedestal and RMSCentre of gravity method of pulse time calculationLookup table usageThe enclosed loop microsequencer (ELMS)

Radiation IssuesRadiation effectsFPGA applications with radiation issuesSEE ratesSpecial advantages and vulnerability of FPGAs in spaceMitigation of SEU

Time-over-Threshold: The Embedded Particle-Tracking Silicon Microscope (EPTSM)EPTSM systemTime-over-threshold (TOT): analog ASIC PMFEParallel-to-serial conversionFPGA function
Appendix
Index
References appear at the end of each chapter.