Design Recipes for Fpgas ― Using Verilog and Vhdl
商品資訊
ISBN13：9780080971292
出版社：Elsevier Science Ltd
作者：Peter Wilson
出版日：2015/09/25
裝訂／頁數：平裝／392頁
規格：22.9cm*18.4cm*2.5cm (高/寬/厚)
商品簡介
This book provides a rich toolbox of design techniques and templates to solve practical, every-day problems using FPGAs. Using a modular structure, it provides design techniques and templates at all levels, together with functional code, which you can easily match and apply to your application. Written in an informal and easy to grasp style, this invaluable resource goes beyond the principles of FPGAs and hardware description languages to demonstrate how specific designs can be synthesized, simulated and downloaded onto an FPGA. In addition, the book provides advanced techniques to create ‘real world’ designs that fit the device required and which are fast and reliable to implement.
- Contains examples that are rewritten and tested in Verilog, the language most widely used by FPGA developers within the industry
- Describes high-level example applications and provides the building blocks for implementation
- Demonstrates theory, but enables engineers to immediately start practical work
- Singles out the most important parts of the language that are needed for design recipes
- Goes beyond the principles of FPGAs and hardware description languages to demonstrate how specific designs can be synthesized, simulated, and downloaded onto an FPGA
購物須知
外文書商品之書封，為出版社提供之樣本。實際出貨商品，以出版社所提供之現有版本為主。部份書籍，因出版社供應狀況特殊，匯率將依實際狀況做調整。
無庫存之商品，在您完成訂單程序之後，將以空運的方式為你下單調貨。為了縮短等待的時間，建議您將外文書與其他商品分開下單，以獲得最快的取貨速度，平均調貨時間為1~2個月。
為了保護您的權益，「三民網路書店」提供會員七日商品鑑賞期(收到商品為起始日)。
若要辦理退貨，請在商品鑑賞期內寄回，且商品必須是全新狀態與完整包裝(商品、附件、發票、隨貨贈品等)否則恕不接受退貨。