Modeling the performance of a field effect transistor having a dynamically depleted channel region: United States Patent 9996650
商品資訊
定價
：NT$ 480 元無庫存，下單後進貨(到貨天數約30-45天)
可得紅利積點：14 點
相關商品
商品簡介
商品簡介
Disclosed are a system, a method and a computer program product for accurately modeling the performance of a body-contacted, asymmetric double gate, dynamically depleted (DD), semiconductor-on-insulator (SOI) field effect transistor (FET). This modeling can be performed, using iterative processing, to determine the conditions (e.g., back gate bias voltage, front gate bias voltage, body resistance and body charge) under which the FET channel region transitions from being in a partially depleted (PD) state such that the FET functions as a PD SOI FET to being in a fully depleted (FD) state such that the FET functions as a FD SOI FET. Once these conditions are known (i.e., once the model is generated), the DD SOI FET can be incorporated into top-level integrated circuit designs with specifications that either meet the conditions or do not meet the conditions, depending upon the desired function of the DD SOI FET within the integrated circuit.
您曾經瀏覽過的商品
購物須知
外文書商品之書封，為出版社提供之樣本。實際出貨商品，以出版社所提供之現有版本為主。部份書籍，因出版社供應狀況特殊，匯率將依實際狀況做調整。
無庫存之商品，在您完成訂單程序之後，將以空運的方式為你下單調貨。為了縮短等待的時間，建議您將外文書與其他商品分開下單，以獲得最快的取貨速度，平均調貨時間為1~2個月。
為了保護您的權益，「三民網路書店」提供會員七日商品鑑賞期(收到商品為起始日)。
若要辦理退貨，請在商品鑑賞期內寄回，且商品必須是全新狀態與完整包裝(商品、附件、發票、隨貨贈品等)否則恕不接受退貨。