Nano-Scale CMOS Analog Circuits ─ Models and CAD Techniques for High-Level Design

With the scaling of MOS transistors to sub-90nm regime, several secondary issues related to the physics of nano-scale MOS transistors and the process technology start playing dominant role in determining the performances of nano-scale analog circuits. The development of structured computer-aided design (CAD) techniques for architecture-level and circuit-level design of analog circuits has been the subject area of active research for both academia and industries over the last few decades.

Nono-scale CMOS Analog Ciruits presents a comprehensive discussion on the challenges of nano-scale analog circuit design and proposes a knowledge-based computer-aided design approach for the design of nano-scale analog circuits. Researchers and post graduate students are considered to be the primary readers of this book. Analog circuit designers will also find the book extremely beneficial for reviewing several fundamental concepts which dictate the performance of sub-90nm analog circuits and the associated design tools to a large extent.

Soumya Pandit received a B.Sc degree with Physics Honors, M.Sc degree in electronic science from University of Calcutta in 1998 and 2000, and an M.Tech degree in radio physics and electronics from the same university in 2002. He obtained his PhD degree from Indian Institute of Technology, Kharagpur in information technology in the year 2009. His current research activities are on statistical CMOS analog circuit design and optimization, process-device-circuit interaction, and soft computing applications. Dr. Pandit has to his credit several international journal and conference publications. He is a member of IEEE, USA and an associate member of the Institute of Engineers (India).

Chittaranjan Mandal received his PhD from the Indian Institute of Technology, Kharagpur, India, in 1997. He is currently a professor in the Department of Computer Science and Engineering and also the School of Information Technology at IIT, Kharagpur. His research interests include high-level system design, formal modeling, and verification. He has been an Industrial Fellow of Kingston University, UK, since 2000 and was also a recipient of a Royal Society Fellowship for conducting collaborative research in the UK. He has handled sponsored projects from government agencies as well as private agencies such as Nokia, Natsem, and Intel. He also serves as a reviewer for several journals and conferences.

Amit Patra received B.Tech., M.Tech., and Ph.D. degrees from the Indian Institute of Technology, Kharagpur in 1984, 1986, and 1990 respectively. He is currently a professor of electrical engineering at IIT Kharagpur where he served as the Dean (Alumni Affairs and International Relations) between 2007 and 2013. His current research interests include power management circuits, mixed-signal SoC design and embedded control systems. He has published more than 200 research papers and designed about 12 integrated circuits. He has carried out sponsored research with multiple industries such as National Semiconductor Corporation, Freescale Semiconductor, Infineon Technologies and Maxim Integrated Circuits.