嵌入式鍺矽源漏工藝開發（簡體書）

內容簡介
本書對28納米多晶矽柵氧邏輯技術的嵌入式鍺矽源漏外延工藝開發及相應PMOSFET器件關鍵問題進行研究，實現高質量鍺矽源漏的外延。在此基礎上開發出一種利用離子注入技術提升源漏特性的新型工藝，能夠更好地滿足28納米低功耗(射頻)芯片量產要求。同時，本書簡要介紹了適用于未來FinFET結構的鍺矽源漏外延工藝。

Abstract
This book investigates the development of the embedded SiGe source/drain epitaxy process and the corresponding key issues of PMOSFETs based on 28 nm logic technology with polycrystalline Si/SiON gate structure, successfully achieving high-quality SiGe source/drain epitaxy. A novel process using ion implantation technology to improve source/drain characteristics has also been developed, which can better meet the mass production requirements of 28 nm low-power (RF) chips. This book also briefly introduces the embedded SiGe source/drain epitaxy process suitable for future FinFETs.